Talk Title: Do AI Chips Pose Different Quality and Reliability Challenges for Semiconductor Package Technology?
Abstract
Do AI Chips Pose Different Quality and Reliability Challenges for Semiconductor Package Technology?
AI accelerators are pushing semiconductor packaging into uncharted territory: multi-die, multi-foundry chiplet stacks, hybrid bonding, co-packaged optics, intense AI workloads, extremely large form factors, power exceeding 1kW per package, high yield expectations and low field DPM requirements. Development is further challenged by aggressively compressed time-to-market windows that limit the time available for product maturation. While the technology shifts create new interactions between thermal, mechanical, and electrical stresses, the fast development cycles are straining the sampling plans, FMEAs, test and burn-in strategies that companies have long relied upon to deliver high yielding and reliable products. The talk will examine the changing package architecture to meet AI product needs from the large form factors that accommodate different silicon node chiplets to integration of optical and electronic components on the same package technology. The classic and emerging testing needs, and failure modes that need to be accommodated for these AI chips. The audience will get a flavor of quality and reliability strategy necessary to enable high-quality AI hardware.
Shubhada Sahasrabudhe is a dynamic and impact-driven senior technical leader with a distinguished career in semiconductor Quality and Reliability (Q&R). With a strong background in product quality, innovation, and technology development, she has played a pivotal role in enhancing industry-wide quality strategies and fostering collaborations with major Data Center Companies. Her expertise spans quality modeling, testing methodologies, and customer quality experience, making her an invaluable asset in driving technological and business innovation. She has 9 patents and over 30 publications. She is a co-chair of IEEE Heterogeneous Integration Roadmap Reliability Chapter. She has received multiple awards including “2021 woman in engineering” award by American Society of Mechanical Engineers.
Message From the Section Chair
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Dear ASQ Silicon Valley Quality Professionals,
Welcome to 2026—a year of groundbreaking advancements in quantum computing, yet also a stark reminder of climate change’s impact. Experiencing freezing temperatures in Florida during my recent visit to the University of Florida and witnessing ongoing wildfires in California underscores the urgency of sustainable solutions.
ASQ Silicon Valley remains committed to supporting emerging technologies and cleantech for a sustainable future. I want to recognize each of you for your contributions to our section’s success. 2024 was marked by two major initiatives—the Inaugural Cleantech Conference and the Fireside Leadership Summit. For 2025, I’m pleased to announce our leadership updates: Congratulations to Aruna Ghildiyal, our new Program Chair, and welcome to Narjes Seyedin and Rishabh Siingh as new core committee members. Pegah Mottataghizadeh will continue as Operations Chair.
Looking ahead, we will elevate our annual Cleantech Conference and Fireside Summit while continuing our flagship Technical Speaker Series (Tech Talk), which attracts 60+ attendees per session. With over 2,000 ASQ members and 5,000+ quality professionals in the Bay Area, we provide a vibrant platform for networking and professional growth in emerging technologies. Let’s push boundaries, share knowledge, and foster leadership development to drive innovation and quality excellence in 2025.
Thank you, and I look forward to another impactful year together.
Sincerely,
Dr. Sunil Roy, ASQ-SV Chair
Senior Director, Head of Quality Engineering
QuantumScape Battery